Document Type
Report
Date
3-1977
Keywords
logic
Language
English
Disciplines
Computer Sciences
Description/Abstract
This paper presents a method of using hardware redundancy to ease the problem of fault testing in sequential logic networks. Sequential logic networks are constructed using two kinds of dual-mode logic gates, one of which is specifically required to initialize a feedback loop to some logic value. Initially, it is shown that these networks can be tested for all single stuck-at-faults with six function-independent tests. Next, this method is generalized to detect large classes of multiple faults with six function-independent tests. In both cases, the network must have the proper number of extra inputs.
Recommended Citation
DasGupta, Sumit; Hartmann, Carlos R.P.; and Rudolph, Luther D., "DUAL-MODE SEQUENTIAL LOGIC FOR FUNCTION INDEPENDENT FAULT-TESTING" (1977). Electrical Engineering and Computer Science - Technical Reports. 41.
https://surface.syr.edu/eecs_techreports/41
Source
local
