Degree Type

Honors Capstone Project

Date of Submission

Spring 5-1-2009

Capstone Advisor

Duane Marcy

Honors Reader

Ehat Ercanli

Capstone Major

Electrical Engineering and Computer Science

Capstone College

Engineering and Computer Science

Audio/Visual Component


Capstone Prize Winner


Won Capstone Funding


Honors Categories

Sciences and Engineering

Subject Categories

Computer Engineering | Digital Circuits | Other Computer Engineering


Statement of Purpose

The purpose of this Capstone project was to perform synthesis minimizations and optimal mesh algorithm selection for some of the digital components of a prototype Ultrasonic 3D Camera, the subject of my group senior design project for computer engineering. Both of the high-level design tasks that I performed were unnecessary for the scope of the senior design class, whose focus was simply to perform a proof-of-concept or create a basic, functioning prototype. The steps I took in performing synthesis optimizations and mesh algorithm selection went beyond the scope of the senior project, by doing the polishing that would be most suited for a project that was eventually going to be turned into an actual product.

Design Methodology

Synthesis optimizations were performed using the Altera Quartus II software, available to me as a student of the L.C. Smith College of Engineering and Computer Science. With the assistance of the Quartus II sofware, I synthesized the behavioral VHDL code written for the project, and inspected the resulting netlists for places where additional logic was being unnecessarily included. In the places where unnecessary logic was found, I eliminated it, by rewriting behavioral code as structural, or by simply clarifying the definition of components.

Mesh algorithm selection was performed using the Microsoft Visual Studio IDE (Integrated Design Environment) in conjunction with the OGRE 3D graphics engine. Using Visual Studio and OGRE, I was able to experiment with different mesh-forming algorithms and determine which method was best suited for the Camera, given the nature of the incoming data.


The VHDL code for the project is now optimized for synthesis, such that if my group were to take steps to have the VHDL code synthesized into a netlist, and then eventually into a mask, and then turned into an actual integrated circuit, that circuit would be almost minimally small, while still performing all its necessary functions. Likewise, the mesh algorithm selected, the naïve method, works perfectly well with the nature of the data that the Camera obtains.

Creative Commons License

Creative Commons Attribution-Noncommercial-No Derivative Works 3.0 License
This work is licensed under a Creative Commons Attribution-Noncommercial-No Derivative Works 3.0 License.



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