Document Type
Report
Date
8-1991
Keywords
Artificial intelligence; computer control; constraint theory; delays; monitoring; safety; system integrity
Language
English
Disciplines
Computer Sciences
Description/Abstract
A form of explicit clock temporal logic (called TLrt) useful in specifying timing constraints on controller actions, a real-time database (rtdb) items, and constraints in a real-time constraint base (rtcb), is presented. Timing as well as other forms of constraints are stored in the rtcb. A knowledge-based approach to ensure the integrity of information in an rtdb is given. The rtcb is realized as a logic program called Constrainer, which is a historyless integrity checker for a real-time database. The consistency and integrity issues for an rtcb and rtdb are investigated. The formal bases for a temporally complete rtdb and knowledgeably complete controller are presented. A partial TLrt specification of a knowledgeable controller for a Gas Burner is given. An illustration of a rtdb and rtcb in the context of the sample real-time system is also given.
Recommended Citation
Ramanna, S. and Peters, J. F. III, "Explicit Clock Temporal Logic in Timing Constraints for Real-Time Systems" (1991). Electrical Engineering and Computer Science - Technical Reports. 107.
https://surface.syr.edu/eecs_techreports/107
Source
local
Additional Information
School of Computer and Information Science, Syracuse University, SU-CIS-91-26