Dual-Mode Sequential Logic for Function Independent Fault-Testing
S. DasGupta et al., “Dual-Mode Sequential Logic for Function Independent Fault-Testing," Syracuse Univ., New York, Tech. Rep. SU-CIS-77-03, 1977.
This paper presents a method of using hardware redundancy to ease the problem of fault testing in sequential logic networks. Sequential logic networks are constructed using two kinds of dual-mode logic gates, one of which is specifically required to initialize a feedback loop to some logic value. Initially, it is shown that these networks can be tested for all single stuck-at-faults with six function-independent tests. Next, this method is generalized to detect large classes of multiple faults with six function-independent tests. In both cases, the network must have the proper number of extra inputs.